TSMC’s leadership position in the semiconductor manufacturing industry is as strong as ASML’s in the lithography equipment market or NVIDIA’s in artificial intelligence hardware. Its market share currently oscillates in the orbit of 54%, a figure that places it with a notable advantage over Intel and Samsung, which are its strongest competitors. Both companies have a share of approximately 17%.
However, these last two companies are going very strong. Both aspire to increase their weight in the integrated circuit production market by taking a portion of its pie from TSMC, and they are taking very clear steps that point in that direction. Samsung has been producing 3 nm chips since 2022, like TSMC, although we have tangible indications that invite us to conclude that the performance per wafer it is obtaining is less than 70%, which is the value considered minimum to ensure the profitability of this technology. of integration.
Intel, for its part, has adopted an extremely ambitious strategy since the arrival of Pat Gelsinger to the company’s leadership. One of the ingredients in his recipe involves investing at least $80 billion in the development of several cutting-edge integrated circuit factories that will presumably be ready long before the end of this decade. And, on the other hand, Gelsinger has set out to have the best transistors and the most advanced integration technology on the planet by 2025. That’s it.
TSMC is not going to hand over the baton easily
The battle that TSMC, Intel and Samsung are going to fight during the remainder of the decade is going to be fierce. And, curiously, the three companies will certainly orchestrate their strategy around the same key piece: ASML’s new extreme ultraviolet (UVE) and high aperture photolithography equipment. The first of them is about to arrive at the Intel factory in Hillsboro (USA) to begin the testing phase, but presumably during 2024 these three companies will receive more units of this highly sophisticated machine.
This equipment will be essential to produce semiconductors beyond 3 nm, but the fact that these companies use the same ASML machines to manufacture them does not guarantee at all that they will obtain the same performance per wafer. Nor are they going to achieve the same competitiveness. TSMC is going to defend itself tooth and nail. And we know this because during the IEDM (International Electron Devices Meeting) conference, which was held just a few days ago in San Francisco, he anticipated what his itinerary will be for the rest of the decade. And it is extremely ambitious.
The slide that we publish below these lines shows the milestones that TSMC hopes to achieve during the remainder of the decade. There are several very important achievements, but without a doubt the most impactful are the launch of the A10 (1 nm) node in 2030, and also the development of next-generation packaging technologies that will presumably make integration possible at the end of this decade of 1 billion transistors (1 billion of ours and not the Anglo-Saxons) in a single integrated circuit.
To make these milestones possible, TSMC engineers will have to address many challenges, among which the development of new materials stands out. But who knows, they might make it. Whatever happens, we can be sure that strong emotions await us in the field of semiconductors in the coming years. There is no doubt about that.